Exemplary embodiments of the present invention relate to a technology for fabricating a semiconductor device, and more particularly, to a semiconductor device using a change in electrical resistance such as a non-volatile Resistive Random Access Memory (ReRAM), and a method for fabricating the same.
Recently, researchers are studying to develop next-generation memory devices that may substitute Dynamic Random Access Memory (DRAM) and flash memory. Among the next-generation memory devices is a ReRAM, which is a semiconductor device that performs switching between at least two different electrical resistance states.
FIG. 1 is a cross-sectional view illustrating a semiconductor device using a change in electrical resistance according to a prior art.
Referring to FIG. 1, the conventional semiconductor device using a change in electrical resistance may have a structure where a variable resistance layer 13 may be interposed between a lower electrode 11 and an upper electrode 12. The variable resistance layer 13 may be formed of a transition metal oxide (TMO), and the variable resistance layer 13 formed of a transition metal oxide may include a plurality of vacancies inside, which may be oxygen vacancies.
A switching mechanism of the semiconductor device having the above-described structure is as follows.
When a bias is applied to the lower electrode 11 and the upper electrode 12, the vacancies inside the variable resistance layer 13 may be rearranged according to the applied bias. As a result of the vacancy rearrangement, conductive filament may be generated or pre-existing conductive filament may be deconstructed. According to the generation or deconstructing of the conductive filament inside the variable resistance layer 13, the variable resistance layer 13 may represent two different resistance states. To be specific, when the conductive filament is generated, the variable resistance layer 13 may represent a low electrical resistance state. When the conductive filament is deconstructed, the variable resistance layer 13 may represent a high electrical resistance state. Further, an operation that generates the conductive filament inside the variable resistance layer 13 so that the variable resistance layer 13 represents a low electrical resistance state may be called a set operation, and an operation that deconstructs a pre-existing conductive filament so that the variable resistance layer 13 represents a high electrical resistance state may be called a reset operation.
In the conventional semiconductor device, the variable resistance layer 13 may be formed through a Physical Vapor Deposition (PVD) process or an Atomic Layer Deposition (ALD) process. Here, as the variable resistance layer 13 has a uniform thickness, stable switching characteristics may be secured. Therefore, it may be more beneficial to use the atomic layer deposition method than the physical vapor deposition method to form the variable resistance layer 13.
However, since the variable resistance layer 13 formed through the atomic layer deposition process may have a stoichiometrically stable structure where little impurity exists inside the layer, it may include a small number of oxygen vacancies generated inside the variable resistance layer 13, compared with a variable resistance layer 13 formed through the physical vapor deposition process. Here, if the number of oxygen vacancies inside the variable resistance layer 13 is relatively low, the operation characteristics of the semiconductor device using a change in electrical resistance may deteriorate, such as switching characteristics, endurance characteristics, and set/reset operation characteristics, e.g., set/reset current and set/reset time may deteriorate. In particular, the number of oxygen vacancies inside the variable resistance layer may greatly affect the switching characteristics of the semiconductor device using a change in electrical resistance.
Therefore, in order for the variable resistance layer 13 formed through atomic layer deposition process to secure the switching characteristics, it may be more beneficial that the variable resistance layer 13 is formed thinner than the variable resistance layer 13 formed through the physical vapor deposition process. However, if the variable resistance layer 13 is thin, a leakage current path may be formed inside of the variable resistance layer 13, and thus a power consumption of the semiconductor device may increase.
FIG. 2 is a cross-sectional view illustrating a known semiconductor device using a change in electrical resistance according to an improved prior art.
Referring to FIG. 2, the semiconductor device fabricated according to the improved prior art includes a variable resistance layer 13 interposed between a lower electrode 11 and an upper electrode 12, and a reactive metal layer 14 is interposed between the variable resistance layer 13 and the upper electrode 12.
However, since the semiconductor device fabricated according to the improved prior art includes the reactive metal layer 14 disposed over the variable resistance layer 13, oxygen vacancies, which are supposed to be generated inside the variable resistance layer 13, may be generated, for example, only at the interface where the variable resistance layer 13 and the reactive metal layer 14 contact each other. For this reason, the switching characteristics required to secure a performance of a semiconductor device using a change in electrical resistance may be achieved only when the variable resistance layer 13 is thin. Therefore, although there is the reactive metal layer 14 formed in the semiconductor device, the power consumption may increase due to leakage current.